1. Field of the Invention
This invention relates to microprocessors. In particular, the invention relates to reducing latency in memory accesses.
2. Description of Related Art
Highly demanding applications such as multimedia and graphics have created a bottleneck in microprocessor systems due to their high bandwidth requirements between the processing devices and the system memory. To provide efficient usage of the system memory, fast peripheral buses have been developed to allow peripheral devices to access the system memory efficiently.
Traditionally, all bus accesses to the system memory are checked against the processor's cache to get the most updated data. This checking on the bus is referred to as bus snooping. The disadvantages of the bus snooping include long initial latencies to access the system memory. Accesses that are initiated on the bus, therefore, still suffer long latencies, especially for read accesses.
Therefore there is a need in the technology to provide a simple and efficient method to reduce latencies for bus accesses to system memory.